A simple reconfigurable microprocessor in a 36 macrocell CPLD

dc.contributor.authorWijesinghe, W.A.S.
dc.contributor.authorJayananda, M.K.
dc.contributor.authorSonnadara, D.U.J.
dc.date.accessioned2011-10-05T09:54:31Z
dc.date.available2011-10-05T09:54:31Z
dc.date.issued2011
dc.description.abstractThis paper describes a simple microprocessor developed using a complex programmable logic device (CPLD), with an instruction set optimized for data acquisition applications. The processor encompasses a tiny instruction set having only the instructions required in data acquisition applications. Due to optimization of the features, it was possible to fit both the CPU and the programme memory in the 36 macrocell Xilinx XC9536XL CPLD. The designing of the CPU was carried out using the hardware description language VHDL. The reconfigurability of the CPLD using VHDL enables the change of features of the CPU, including the instruction set, to suit user requirements. An example data acquisition system implemented using this CPU is also discussed.en_US
dc.identifier.citationJournal of National Science Foundation, 39 3 (2011) 261-266
dc.identifier.urihttp://archive.cmb.ac.lk/handle/70130/237
dc.language.isoenen_US
dc.subjectreconfigurableen_US
dc.subjectmicroprocessoren_US
dc.subject36 macrocell CPLDen_US
dc.titleA simple reconfigurable microprocessor in a 36 macrocell CPLDen_US
dc.typeResearch abstracten_US

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