CPLD Based Simple Microprocessor for Data Acquisition

Show simple item record

dc.contributor.author Wijesinghe, W.A.S.
dc.contributor.author Jayananda, M.K.
dc.contributor.author Sonnadara, D.U.J.
dc.date.accessioned 2012-12-19T04:52:27Z
dc.date.available 2012-12-19T04:52:27Z
dc.date.issued 2005
dc.identifier.citation Proceedings of the Technical Sessions, Institute of Physics Sri Lanka, 21 (2005) 21-27
dc.identifier.uri http://archive.cmb.ac.lk:8080/xmlui/handle/70130/3253
dc.description.abstract This paper describes a simple microprocessor developed using a Complex Programmable Logic Device (CPLD), with an instruction set optimized for data acquisition applications. Most low-cost data acquisition systems are built using general purpose microcontrollers with large instruction sets. However, only a very small number of instructions are actually needed in data acquisition applications. Therefore, with the aim of minimizing the cost and lowering the overheads, a simple microprocessor was developed with a tiny instruction set containing only the instructions required in the data acquisition applications. Due to the optimization of the features, it was possible to fit both the CPU and the program memory in the 36 macrocell Xilinx XC9536XL CPLD costing approximately RS. 500. The design of the CPU was carried out using the hardware description language VHDL. Reconfigurability of the CPLD using VHDL makes it possible to change the features of the CPU, including the instruction set, to suit the user requirements. An example data acquisition system implemented using this CPU is also described in this paper.
dc.language.iso en en_US
dc.subject Data acquisition
dc.subject FPGA
dc.subject.other Data acquisition
dc.title CPLD Based Simple Microprocessor for Data Acquisition en_US
dc.type Research paper en_US


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search DSpace


Advanced Search

Browse

My Account