A simple reconfigurable microprocessor in a 36 macrocell CPLD

dc.contributor.author	Wijesinghe, W.A.S.
dc.contributor.author	Jayananda, M.K.
dc.contributor.author	Sonnadara, D.U.J.
dc.date.accessioned	2011-10-05T09:54:31Z
dc.date.available	2011-10-05T09:54:31Z
dc.date.issued	2011
dc.identifier.citation	Journal of National Science Foundation, 39 3 (2011) 261-266
dc.identifier.uri	http://archive.cmb.ac.lk:8080/xmlui/handle/70130/237
dc.description.abstract	This paper describes a simple microprocessor developed using a complex programmable logic device (CPLD), with an instruction set optimized for data acquisition applications. The processor encompasses a tiny instruction set having only the instructions required in data acquisition applications. Due to optimization of the features, it was possible to fit both the CPU and the programme memory in the 36 macrocell Xilinx XC9536XL CPLD. The designing of the CPU was carried out using the hardware description language VHDL. The reconfigurability of the CPLD using VHDL enables the change of features of the CPU, including the instruction set, to suit user requirements. An example data acquisition system implemented using this CPU is also discussed.	en_US
dc.language.iso	en	en_US
dc.subject	reconfigurable	en_US
dc.subject	microprocessor	en_US
dc.subject	36 macrocell CPLD	en_US
dc.title	A simple reconfigurable microprocessor in a 36 macrocell CPLD	en_US
dc.type	Research abstract	en_US